Job offers: design verification engineer staff

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Procare USA

L&D Labor and Delivery Registered Nurse Travel Job

Procare USA :: Los Angeles, California :: over 30 days ago

... delivery process and help them have a safe and healthy birth experience. Labor and delivery nurses are typically licensed registered nurses (RN) who work at a hospital as staff nurses. Labor and delivery nurses do not require special licensing or certifications, but usually work with a mentor who will teach them how to be efficient and productive ...

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Procare USA

Progressive Care Unit/PCU Registered Nurse (RN) Travel Job

Procare USA :: Los Angeles, California :: over 30 days ago

... local per diem shifts and direct hire placement. Procare USA offers top pay and benefits. Each Medical Professional will be assigned to a dedicated Medical Recruiter who will find you the right position. Our Mission is to provide Medical Professionals with the best opportunities and staff our client healthcare facilities with top quality personnel!

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Mechanical Project Engineer

The Judge Group :: Lawrenceville, Georgia :: over 30 days ago

... Company is looking for: POSITION: Mechanical Project Engineer LOCATION: Lawrenceville, Georgia SALARY: $80-90K ... technical solutions with heavy focus on platform design, reuse and knowledge-management utilizing the design ... configuration management, integration, validation, verification and qualification Knowledge in Mechanical Analysis ( ...

verification Engineer

Macropace Technologies :: Hillsboro, Oregon :: over 30 days ago

Design Verification Engineer Hillsboro, OR Full Time position Job Description: -In depth knowledge/experience of System Verilog OVM/UVM. -Experience & good understanding of asic/fpga pre-silicon verification concept ***. focus vs full/constraint random testing, coverage based verification, testbenching, ip vs fullchip testing. -Experience in ...

Verification Engineer

Tekforce Corporation :: Irvine, California :: 12 days ago

Verification Engineer. Pls send resume to ********************* with rate/hr and current location. Verification engineer with experience with Cadence tools and proficiency in System Verilog, UVM and scripting languages. Looking for a senior verification engineer to work as part of the development team on next generation Controllers ...

OVM/UVM Verification Engineer

Macropace Technologies :: Hillsboro, Oregon :: over 30 days ago

OVM/UVM Verification Engineer Full Time Position Hillsboro, OR Job Description: Bachelor/Masters Degree in Electronic/Electrical Engineering with Major in VLSI/Microelectronics In depth knowledge/experience of System Verilog OVM/UVM. Experience & good understanding of ASIC/FPGA pre-silicon verification concept ***. focus vs full/constraint ...

ASIC Verification Engineer - Hillsboro, OR

Macropace Technologies :: Hillsboro, Oregon :: over 30 days ago

Sr. OVM/UVM Verification Engineer Work Location: Hillsboro, OR Full Time Position Experience: 7+ Years Responsibilities: Should have strong experience in OVM / UVM IP/SOC Verification In depth knowledge/experience of System Verilog OVM / UVM Experience & good understanding of ASIC/FPGA pre-silicon verification concept ***. focus vs ...

ASIC Verification Engineer

Macropace Technologies :: San Jose, California :: over 30 days ago

ASIC Verification Engineer San Jose, CA Full Time Position Job Description: 5 to 10 years of directly related industry experience in ASIC / SoC Verification Expert knowledge in UVM, which is an object-oriented Hardware verification language library based on System Verilog. Extensive architectural and verification knowledge of high performance bus ...

ASIC Verification Engineer - San Jose, CA

Macropace Technologies :: San Jose, California :: over 30 days ago

ASIC Verification Engineer San Jose, CA Full Time Position Job Description: 5 to 10 years of directly related industry experience in ASIC / SoC Verification Expert knowledge in UVM, which is an object-oriented Hardware verification language library based on System Verilog. Extensive architectural and verification knowledge of high performance bus ...

VLSI Digitial Back End Architect

Wipro :: Austin, Texas :: 28 days ago

Mandatory Skills: VLSI Physical Verification Desirable Skills: VLSI Physical Place and Route Job Description: Key skills required for the job are: * VLSI Physical Verification (Mandatory) * VLSI ... 8-10 YEARS Mandatory Skills: VLSI Physical Verification VLSI Physical Design Planning, VLSI Physical Place and Route, VLSI Design For Testability - DFT, ...

UVM Verification Engineer

Macropace Technologies :: Folsom, California :: over 30 days ago

... Macropace Technologies. We have a job opening with suits for you, please find below job description and let me know your if you are interested for this position. Verification Engineer Folsom, CA Full Time Position Job Description: ---------------------- Bachelor/Masters Degree in Electronic/Electrical Engineering with Major in ...

Sr Staff ASIC Engineer

Brocade Communications Systems, Inc. :: San Jose, California :: 14 days ago

This individual will be a key member of the ASIC system level verification team. Responsibilities will include developing the verification environment; test plans and verifying functions of the ASIC. Hands-on implementation work for every aspect of ASIC verification, working closely with the system group, architects, design and verification teams. The successful ...

HVAC Engineer - PE or EIT

Cameron Craig :: Lansing, Michigan :: 18 days ago

MECHANICAL ENGINEER to work on a wide range of industrial, government, education and/or ... engineering assignments including design of plumbing, HVAC, and fire protection ... activities such as assessments and verification of existing facilities, energy audits, ... to complete a project; mentors junior staff. REQUIRED SKILLS: * 5+ YEARS HVAC ...

Software Test Engineer | 2 Years | Waterloo IA

Genius Business Solutions :: Waterloo, Iowa :: 12 days ago

SOFTWARE TEST ENGINEER The software test engineer is responsible for executing test plans for a given subsystem using MiL/SiL, HiL and Vehicle assets. The software tester is responsible for implementing and executing functional verification test cases. During implementation of test cases, the software tester will provide traceability to the ...

Electrical Design Engineer - Contract Job

Stars HR Inc :: Pittsburgh, Pennsylvania :: 25 days ago

StarsHR has a long-term contract need for an Electrical Design Engineer for our client here in Pittsburgh. Qualified candidates will have a minimum of a BSEE (MSEE preferred), and 8+ yrs. of demonstrated ... DFM & DFA Lean Concepts Variable Cost Productivity Design Verification & Validation Problem Investigation This is a long-term ...

Physical Design Engineer

Macropace Technologies :: Hillsboro, Oregon :: over 30 days ago

Physical Design Engineer Full Time Position Hillsboro, OR Job Description: We are looking for a cutting edge experienced RF/Analog Physical Layout Engineer with a strong technical ... designs. Abstract view generation, RC extraction, Layout vs. Schematic (LVS) verification, Design Rule Check (DRC) verifications, Electrical Rule Check (ERC) ...

Analog Design Engineer

Recruiter.com :: Austin, Texas :: 15 days ago

... IC's. You will participate in all aspects of the design including specification, architectural development, ... level design, layout supervision, chip level verification, and lab validation. Description: Our company's ... Description: Our company's Mixed Signal Audio Division is seeking highly skilled Analog IC Design Engineer ...

VLSI Digitial Back End Architect

Wipro :: Mountain View, California :: 25 days ago

Job Description: Key skills required for the job are: * VLSI Physical Design Planning (Mandatory) * VLSI Physical Place and Route * VLSI Physical Verification - DRC Minimum work experience:5 - 8 Years Key skills required for the job are: * VLSI Physical Design Planning (Mandatory) * VLSI Physical Place and Route * VLSI Physical Verification - DRC ...

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